An article on Verimag in Minalogic News

Sections

• Verimag
  • Direction and Boards
  • Members
  • Publications
  • Tools
  • Ongoing Phd Thesis
  • Jobs and Internships
  • Projects
  • Partners
  • Workshops and Conferences
  • Seminars
  • Documents
• Topics
• Contact
• Site Map

---

• Building Access

News

Seminars

• Seminars
  • 17 September 2026 Loup Lobet: Vir, an intermediate representation for simd text processing
  • 26 November 2026 Basile Gros: Proxy-based small inversions for the rocq prover (Phd)

New publications

• Some Recent Publications
  • Marius Bozga, Radu Iosif, Arnaud Sangnier, Neven Villani: Counting Abstraction and Decidability for the Verification of Structured Parameterized Networks
  • Erwan Jahier, Karine Altisen, Stéphane Devismes, Gabriel Baiocchi Sant'anna: Model checking of distributed algorithms using synchronous programs
  • Iulia Dragomir, Carlos Redondo, Tiago Jorge, Laura Gouveia, Iulian Ober, Marius Bozga, Maxime Perrotin: Specification and model-checking of space systems in the TASTE toolset
  • Marius Bozga, Radu Iosif, Florian Zuleger: Regular Grammars for Sets of Graphs of Tree-Width 2

Jobs and internships

• Jobs and internships