@inproceedings{BBM06,
title = { On Interleaving in Timed Automata },
author = {Ben Salah, Ramzi and Bozga, Marius and Maler, Oded},
year = {2006},
booktitle = {CONCUR 2006},
pages = {465-476},
publisher = {Springer},
series = {LNCS},
volume = {4137},
team = {DCS, TEMPO},
}
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- 13 November 2025 Yann Herklotz: Towards scalable verification and efficient hardware generation using verified (…)
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- 25 November 2025 Véronique Cortier: Electronic voting: design, attack, and formal verification
- 1 December 2025 Sylvain Boulme: Introduction à la programmation orientée objet en crystal
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- Thomas Vigouroux, Marius Bozga, Cristian Ene, Laurent Mounier: Function Synthesis for Maximizing Model Counting
- Oussama Oulkaid, Bruno Ferres, Matthieu Moy, Pascal Raymond, Mehdi Khosravian: Modeling Techniques for the Formal Verification of Integrated Circuits at Transistor-Level: Performance Versus Precision Tradeoffs
- Marius Bozga, Radu Iosif, Florian Zuleger: Regular Grammars for Sets of Graphs of Tree-Width 2
- Oussama Oulkaid, Bruno Ferres, Matthieu Moy, Pascal Raymond, Mehdi Khosravian, Ludovic Henrio, Gabriel Radanne: A Transistor Level Relational Semantics for Electrical Rule Checking by SMT Solving
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- [Funded PhD] Fault Injection Attacks: Automated Analysis of Counter-Measures At The Binary Level
- [Master] Decision Procedure for Equivalence Relations
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