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MATLAB/Simulink to BIP
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C to BIP
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DOL to BIP
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Distribution
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System Requirements
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Installing the Toolchain
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Coding guidelines for process
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Running an example
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Case Studies
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Case Studies
MJPEG Decoder
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Seminars
Seminars
20 November 2024
Chao Huang:
Safe reinforcement learning with verification in the loss
28 November 2024
Grégoire Bussone:
Reducing copies and memory consumption in synchronous languages
2 December 2024
Thomas Vigouroux:
Quantitative analysis for adaptive attackers (Phd)
12 December 2024
Lucas Bueri:
Tba (Phd)
New publications
Some Recent Publications
Erwan Jahier, Karine Altisen, Stéphane Devismes, Gabriel B. Sant'Anna:
Model Checking of Distributed Algorithms using Synchronous Programs
Florence Maraninchi:
Quelle recherche en informatique pour un numérique inscrit dans les limites planétaires ?
Claire Maiza:
Hardware and software analyses for precise and efficient timing analysis
Karine Altisen, Pierre Corbineau, Stéphane Devismes:
Certification of an exact worst-case self-stabilization time
Jobs and internships
Jobs and internships
[Master] Implementation of critical applications on multi-core: execution mode analysis to reduce interferences
PERSYVAL Master 2 Scholarships
[Funded PhD] Annotations de sécurité pour compilateur optimisant formellement vérifié
[Funded PhD] Quantitative analysis of software security against adaptive attacks
[Master] Adapting Hardware Platforms to a Multi-Core Response Time Analysis Framework
[Master] Analyzing fault parameters triggering timing anomalies
[Master] Exploration by model-checking of timing anomaly cancellation in a processor
[Master] Towards New Frontiers in Multi-Core Response Time Analysis?
[Master]Leakage in presence of an active and adaptive adversary
[PostDoc] Implementation of critical applications on multi-core: execution mode analysis to reduce interferences
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